This is a real finding from one of our own design reviews — caught by Probe, our PCB design-review tool. Here is what it read.

An automated check looks for a rule being broken. A surprising number of real faults are not a broken rule. They are a decision that nobody wrote down.

This is the smallest example we have, and it is the one we show people first.

A small serial EEPROM sits on one of our test boards, and like most of them it has address pins so that several can share a bus. The board uses the completely standard arrangement for setting them: beside each address pin sit two zero-ohm link positions, one going up to the 3.3 V rail and one going down to ground. You fit one or the other. Fitting the upper link straps that address bit high, fitting the lower one straps it low. Everybody has drawn this.

On this board, all four positions are fitted.

Follow the copper and it is not subtle. From the 3.3 V rail, through a fitted zero-ohm link, onto the address node, through a second fitted zero-ohm link, to ground. That is a dead short across the board’s main rail. There are two address pins, so there are two of them.

The bill of materials does not save it. One line item covers nine zero-ohm links of the same value and package, and its do-not-mount column is empty, so all nine are specified as fitted. There is no per-position exception hiding elsewhere either: the board’s list of deliberately unpopulated parts holds four capacitors and nothing else.

What is not in doubt is the intent. The note the designer wrote beside the EEPROM on the sheet gives its bus address as 0x50, which is the address you get with both address bits low. So the two links to ground were the intended pair, and the two links to the rail should have been marked do-not-mount. The engineering is right. The design is right. What is missing is the one marking that turns a pair of positions into a choice instead of a short.

Two things follow, and the order matters.

The rail is shorted to ground in two places, so whatever supplies 3.3 V will go into current limit or be damaged, and nothing else on the board comes up at all. This is not a subtle degradation. It is a board that does not power on.

And separately, even if you imagine the shorts away, both address bits are being driven high and low at the same time, so the EEPROM has no defined address. The part the board uses to identify itself cannot be addressed.

Why the rule stayed silent

There is a deterministic check for exactly this class of problem — a supply shorted to ground — and it did not fire. It was right not to.

That check asks a precise question: does any single net land on both a power pin and a ground pin? Here, no net does. The rail net touches one end of the upper link. The ground net touches one end of the lower link. The address node in the middle touches neither the rail nor ground directly; it only touches two resistors. The short is a series path across an intermediate node, and a rule that reasons about one net at a time cannot see it, because there is no net to see it on.

That is not a bug. It is the rule’s definition, working exactly as written, on a topology nobody had it in mind for. And it is the general shape of the problem: a check’s silence tells you something only if you know what the check was actually looking at. An empty result and a blind spot look identical from the outside.

So two things went in the record, not one. A blocker against the board, and a gap against our own rule. The second is the more valuable of the two, because the board gets fixed once and the rule gets applied to everything after it.

The board is not wrong because somebody made an electronics mistake. It is wrong because a choice that was obvious to the person drawing it was never written anywhere that a machine, or a person building the board, could read.

An empty result and a blind spot look identical from the outside. A review has to know which one it is looking at.